DV - Staff (+) Verification Engineer - AMS modeling
Eliyan · Bay Area, Vancouver or Toronto
Extracted from the posting
Staff verification engineer at Eliyan, an early-stage chiplet startup, owning verification of SerDes AMS models. The role writes RNM AMS SystemVerilog models from schematics with the analog team and checks them against design quality, using SystemVerilog and UVM.
Join the leading chiplet startup! As an Eliyan
Verification Engineer
, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow's chiplet-based systems with best-in-class power, area, manufacturability, and design flexibility. In this role you will lead the verification of Serdes. You will be developing state-of-the-art AMS systemVerilog models (RNM) for best-in-class PHYs. You will own verification of AMS SystemVerilog models. This is a hands-on technical role. You'll work with analog team, look at schematics and write the RNM models. We offer a fun work environment with excellent benefits. We offer a fun work environment with excellent benefits. ONSITE M-F.
