Senior Director, Physical Design & Backend Engineering (HPC)
Hop · Austin, TX
Extracted from the posting
Senior Director leading backend execution (RTL-to-GDS implementation, signoff, tape-out) for HPC SoC and MCU programs. Manages large, globally distributed backend engineering teams across multiple sites. Owns PPA targets and adoption of advanced process node methodologies.
The Senior Director, Physical Design & Backend Engineering is accountable for end-to-end backend execution across HPC SoC and MCU programs, including implementation, signoff, and convergence from RTL to GDS.
This role leads globally distributed engineering teams and ensures delivery of high-quality silicon on schedule, meeting defined power, performance, and area (PPA) targets. The role operates at the intersection of execution, technology enablement, and organizational leadership, driving consistency, scalability, and reliability across multiple sites and concurrent programs.
What you'll do
What we require
Company stack
This posting doesn’t list technologies. These are the ones Hop uses across its other roles.
