About Etched

Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep chain-of-thought reasoning.

Design Infrastructure Engineer

Etched is seeking an Design Infrastructure Engineer to join our rapidly growing team. In this role, you will be integral to building and maintaining the infrastructure for our electronic and mechanical design processes, ensuring the efficient delivery of our cutting-edge custom silicon products. You will manage ECAD and MCAD work flows, establish company standards, and collaborate with product lifecycle and workflow management tools to ensure the highest quality and streamlined design operations.

Representative Projects

• Assist in setting up and maintaining the PLM system to manage engineering BOMs, changes, and revisions from NPI to production, ensuring accuracy and proper change control throughout the product life cycle
• Implement company-standard BOM trees and component part number (P/N) standards, ensuring consistency across designs and departments, and integrate BOMs from the PLM system into the ERP system for streamlined production and procurement
• Implement and enforce company library standards in alignment with industry best practices (e.g., JEDEC, IPC), conducting regular audits and quality checks to ensure accuracy, consistency, and up-to-date component data
• Create and maintain ECAD/MCAD integration flows to ensure smooth collaboration between electrical and mechanical design teams, aligning with internal systems to optimize design efficiency
• Align JIRA workflows with the PLM system to track bugs, tasks, and change management, ensuring seamless integration of design review processes and workflow tracking
• Administer and manage ECAD (e.g., Cadence Allegro) and MCAD (e.g., Siemens FX) tools, including licensing, configuration, and troubleshooting to ensure optimal performance
• Standardize and maintain design release control (ECO) processes to ensure all designs are properly reviewed, documented, and approved before release to production
• Provide design review guidelines and frameworks, ensuring all documentation is complete and compliant with internal and external standards, while facilitating cross-functional design reviews to ensure alignment and quality across teams

You maybe a good fit if you have

• Experience with Cadence Allegro or similar ECAD tools for PCB layout and schematic capture
• Experience with PLM systems and BOM management, particularly in integrating engineering data from design tools to ERP systems
• Knowledge of ECAD/MCAD integration workflows, including working with tools like Allegro Layout and Siemens NX
• Familiarity with industry standards such as JEDEC, IPC, and their application in design libraries
• Hands-on experience with JIRA or similar task management systems, particularly in integrating workflows with PLM systems. Bug database management
• Strong skills in library standardization, quality control, and design release management
• Experience administering ECAD/MCAD tools, including user support, configuration, and maintenance
• Strong communication skills, capable of working cross-functionally with design, engineering, and IT teams
• Experience with custom silicon or AI hardware product development
• Prior experience working in an NPI environment with transitioning products from prototype to production
• Knowledge of ERP systems and their integration with PLM systems for seamless manufacturing handoff

We encourage you to apply even if you do not believe you meet every single qualification.

How we’re different:

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in Cupertino, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

Benefits:

• Full medical, dental, and vision packages, with 100% of premium covered, 90% for dependents
• Housing subsidy of $2,000/month for those living within walking distance of the office
• Daily lunch and dinner in our office
• Relocation support for those moving to Cupertino