About the Role
QuEra Computing, Inc. is seeking a talented and driven Postdoctoral Fellow with a background in quantum physics, quantum error correction or quantum machine learning to contribute to our neutral atom quantum computing research and innovation efforts. This role is a fixed-term assignment. The ideal candidate will help develop new quantum computing applications, design and evaluate quantum algorithms that inform both near-term applications and long-term architectures. This is a unique opportunity to shape the design direction of one of the most promising quantum computing platforms, while working in close collaboration with QuEra scientists, engineers, and product teams in an industry setting.
Key Responsibilities
- Design algorithms and quantum protocols suited to neutral atom platforms and collaborate with software and hardware teams on implementation.
- Propose and evaluate scalable quantum architectures, error correction schemes, and control strategies.
- Explore innovative applications of neutral atom systems in quantum simulation, optimization, machine learning and computation.
- Collaborate with experimental teams to guide system design, interpret results, and validate models.
- Contribute to technical publications, white papers, and patent filings.
- Participate in internal knowledge-sharing sessions and external scientific outreach (e.g., conferences, workshops).
Required Qualifications
- Ph.D. in Physics, Quantum Information, or a closely related field.
- Strong background in quantum information science, and quantum application development
- Experience developing and analyzing time to solution of quantum algorithms or protocols.
- Proficiency with numerical tools (e.g., Python, Julia, QuTiP, or custom simulation code).
- Track record of peer-reviewed publications in top-tier journals.
Preferred Qualifications
- Familiarity with neutral atom platforms, including Rydberg physics, optical lattices, or tweezer arrays.
- Demonstrated expertise in theoretical modeling of atomic systems or quantum platforms.
- Experience in mapping fault-tolerant workloads onto logical microarchitectures, and performing hardware resource estimation.
- Experience in working across theory and application, including engagement with experimentalists and engineers.
