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Unconventional, Inc.

AI Silicon, Analog CAD Engineer

Unconventional, Inc. · 🇺🇸 Mountain View, CA · posted 1 month ago
ApplyFull posting

Extracted from the posting

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Remote
Hybrid
Stack
SPICE, Cadence, SystemVerilog, Python

The posting, condensed

Analog CAD Engineer setting up and managing CAD environments, PDKs, and design flows for AI silicon R&D. Multi-disciplinary team at semiconductor company building energy-efficient AI hardware using advanced process nodes.

About Unconventional, Inc. →

The full posting

About Unconventional

Since 2022, AI has entered the mainstream, reshaping entire industries from education and software development to fundamental consumer behaviors. This revolution has created an unprecedented demand for computation—a demand that is now fundamentally limited by energy, not just in the datacenter, but at a global scale. At Unconventional, our mission is to solve this. We are rethinking computing from the ground up to build a new foundation for AI that is 1000x more efficient. We're doing this by exploiting the rich physics of semiconductors, mapping neural networks directly to the device physics rather than relying on layers of inefficient abstraction.

The Role

As a Member of Technical Staff, Analog CAD Engineer, you will be a foundational member of our multi-disciplinary R&D team. We are looking for individuals who thrive at the intersection of architecture and silicon, turning novel AI concepts into high-performance, energy-efficient hardware. You will be responsible for the full installation, configuration, and integration of our specified CAD tools and Process Design Kits (PDKs) to establish and manage a highly functional, stable analog design environment.

Responsibilities

  • CAD Environment Setup & Management: Drive the full installation, configuration, and integration of CAD environments for analog (and digital) teams.
  • Flow development: Develop agentic AI based analog workflow to improve productivity and design quality
  • PDK & Library Configuration: Manage the installation and version control of foundry-provided PDKs, standard cell libraries, and IO libraries. Setup environment variables, configuration files (e.g., lib.def, startup scripts), and shared library structures for the design team.
  • Schematic & Layout Optimization: Configure the schematic entry and layout editor environments, including bindkeys, display settings, layer definitions, and PCELL (Parameterized Cell) integration.
  • Backend Verification & Tapeout: Create and validate scripts for the final GDSII streamout. Interface with foundry through the entire tapeout process including any tapeout forms, job views, etc.
  • Tool evaluation: Help evaluate new CAD tools, manage a revision control system to handle check-in/checkout procedures and provide visibility across designer libraries.
  • Documentation & Training: Create comprehensive documentation detailing installation procedures, environment settings, and step-by-step run instructions for GDS, LVS, and DRC. Provide thorough knowledge transfer to the internal design team.

Minimum Qualifications

  • Education: B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
  • Experience: 10+ years of industry experience in analog or mixed-signal CAD engineering and EDA tool administration.
  • Technical Expertise: Expertise in installing and validating foundry-provided PDKs and standard cell libraries. Deep understanding of schematic, layout, and simulation setup across different process corners and temperatures. Proficiency in setting up and debugging backend verification rule decks (DRC, LVS, ERC) for advanced nodes. Strong scripting skills in Tcl, Python, or Perl to automate design flows and data analysis.
  • Communication: Excellent written and verbal communication skills, with experience writing comprehensive flow documentation and providing knowledge transfer to design teams.

Preferred Qualifications (Nice to Have)

  • Digital Integration: Hands-on experience creating automated flows bridging Verilog RTL, synthesis, and physical layout back into an analog design environment.
  • Cloud/SaaS CAD: Experience administering EDA tools deployed in SaaS or cloud compute environments, optimizing license allocation and job scheduling.
  • AI Tools: Familiarity with state of the art AI tools to accelerate chip design.

Why Join Us?

  • The Mission: Redefine computing for the next 50 years by solving the fundamental energy limitation of AI at a global scale.
  • The Impact: Shape the company's future as a foundational team member. Enjoy massive ownership and an outsized opportunity to drive change.
  • The Challenge: Dive into deeply complex, intellectually stimulating, and unsolved problems at the cutting edge of multiple, converging fields.
  • The Perks: A comprehensive package including best-in-class health benefits, 401k matching, truly unlimited PTO, and complimentary meals in our Mountain View office.