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18 matches
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Eliyan

Program Management - Principal / Sr. Principal Technical Program Manager – IP, ASIC & Chiplet Platforms

today
Eliyan · San Francisco, CA
On-siteFull-timeUCIe · Jira
Eliyan

PD - Sr Staff — CAD & Design Methodology | RTL-to-GDSII Flow | Advanced Node Methodology |

today
Eliyan · San Francisco, CA
On-siteFull-timeSynopsys · Cadence
Eliyan

PD - IP Lead – Sr Staff, Physical Design

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Eliyan · San Francisco, CA
On-siteFull-timePython · SystemVerilog
Eliyan

DV - Director of Design Verification

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Eliyan · San Francisco, CA
On-siteFull-timeSystemVerilog · UVM
Eliyan

Digital - Staff Digital Design Engineer - PHY

today
Eliyan · San Francisco, CA
On-siteFull-timeSystemVerilog · UCIe
Eliyan

Digital - SerDes Digital Design Lead

today
Eliyan · San Francisco, CA
On-siteFull-timeSystemVerilog · UCIe
Eliyan

Digital - Principal Systems/DSP Engineer

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Eliyan · San Francisco, CA
On-siteFull-timeMATLAB · Simulink
Eliyan

DFT Implementation Lead

today
Eliyan · San Francisco, CA
On-siteFull-timeTessent · TetraMax
Eliyan

Architecture - I/O Architect

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Eliyan · San Francisco, CA
On-siteFull-timePCIe · CXL
Netpreme

Director, ASIC Verification

today
Netpreme · Santa Clara, CA
On-siteFull-timeUVM · Ethernet
Netpreme

Member of Technical Staff, ASIC Verification

today
Netpreme · Santa Clara, CA
On-siteFull-timeEthernet · UCIe
Netpreme

Member of Technical Staff, ASIC Design

today
Netpreme · Santa Clara, CA
On-siteFull-timeVerilog · SystemVerilog
Lumilens

DSP Engineer

today
Lumilens · San Jose, CA
On-siteFull-timePython · Perl
Lumilens

Sr. Physical Design Engineer

today
Lumilens · San Jose, CA
On-siteFull-timeSynopsys ICC2 · Cadence Innovus
Lumilens

IC Design Verification Engineer

today
Lumilens · San Jose, CA
On-siteFull-timeSystemVerilog · UVM
Lumilens

IC/RTL Design Engineer

today
Lumilens · San Jose, CA
On-siteFull-timeSystemVerilog · AXI
Lumilens

RTL Design Lead/IC Front-End Architect/Datapath Lead

today
Lumilens · San Jose, CA
On-siteFull-timeSystemVerilog · UCIe
Lumilens

Verification Lead (Lead DV)

today
Lumilens · San Jose, CA
On-siteFull-timeUVM · SystemVerilog
Eliyan

Program Management - Principal / Sr. Principal Technical Program Manager – IP, ASIC & Chiplet Platforms

Eliyan · 🇺🇸 San Francisco, CA · posted today
ApplyFull posting

Extracted from the posting

Base
Not stated
Equity
Meaningful equity (no figures stated)
Remote
On-site, Bay Area
Stack
UCIe, Jira, Confluence, Smartsheet

TL;DR

Principal/Sr Principal Technical Program Manager owning end-to-end execution of Eliyan IP, ASIC and platform programs for NuLink PHY and NuGear chiplets, from architecture through production. Manages external IP vendors, OSAT partners and direct customer deliverables.

About Eliyan →

The full posting

Eliyan is building the interconnect technology that makes chiplet-based systems possible. Our NuLink™ die-to-die PHY IP and NuGear™ chiplet solutions — offered both as licensable IP and as fully integrated chiplet products — deliver up to 4x the bandwidth and half the power of alternative approaches, letting the industry’s leading AI, HPC, and networking silicon teams mix best-in-class dies into a single high-performance package using both open standards (UCIe) and our own proprietary interconnect. As an Eliyan Principal / Sr. Principal Technical Program Manager, you’ll own the end-to-end execution of our IP, ASIC, and platform programs — from architecture and IP definition through design, verification, silicon bring-up, and production readiness. You’ll work shoulder-to-shoulder with a deep bench of design, packaging, and software experts who operate from first principles and push the envelope to create high-volume, high-performance, manufacturable products. This is a high-visibility, high-ownership role at a fast-moving, early-stage company defining a new category of semiconductor technology.

ON-SITE (BAY AREA)

Key Responsibilities:

  • Program Leadership: Own end-to-end execution of IP, ASIC, and platform programs, from architecture and IP definition through design, verification, validation, silicon bring-up, and production readiness.
  • Plan of Record & Critical Path Management: Build and maintain an integrated program schedule spanning design, verification, DFT, physical design, packaging, and software; own the critical path and drive it to closure.
  • Cross-Functional Coordination: Partner daily with digital design, design verification, DFT, physical design, analog/mixed-signal design, packaging and substrate design, PCB and platform design, silicon bring-up, firmware, and software teams to keep every workstream aligned.
  • Technical Fluency: Get into the technical details of interconnect and chiplet architecture, packaging tradeoffs, and SoC-level integration — enough to ask sharp questions, unblock engineering decisions, and speak credibly with customers and partners.
  • Vendor and IP Management: Manage external IP vendors and OSAT/packaging partners, holding them accountable to committed timelines, specifications, and quality.
  • Customer Engagement: Serve as the primary program interface to customers, defining deliverables and ensuring seamless integration of Eliyan’s IP and silicon solutions into their products.
  • Schedule and Risk Management: Define milestones, maintain a live risk register, and proactively identify and mitigate the risks most likely to move the critical path.
  • Budget and Resource Allocation: Manage program budgets, allocate resources efficiently, and track spend against plan to optimize development efforts.
  • Technical Reviews and Decision-Making: Run regular program and technical reviews, surface tradeoffs, and drive decisions that optimize performance, cost, and schedule.
  • Executive Reporting and Metrics: Quantify program health with clear KPIs, and translate technical detail into concise, decision-ready updates for engineering leadership and executives.
  • Process, Documentation, and Reporting: Define and continuously improve program management practices and tooling as Eliyan scales, maintain clear documentation, and keep stakeholders informed with regular updates.
  • Required Qualifications:

    • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
    • 15+ years of semiconductor program management experience, including pre-silicon and post-silicon execution across at least two full IP or ASIC programs, from concept through production.
    • Proven ability to lead large-scale, complex, multi-disciplinary semiconductor programs from architecture through volume production.
    • Demonstrated ability to juggle multiple concurrent programs at once, making portfolio-level trade-offs — prioritizing resources, schedules, and scope across programs to maximize overall business impact.
    • Deep working knowledge of the full silicon development lifecycle — front-end and back-end design, DV, DFT, packaging, PCB/platform design, and silicon bring-up.
    • Experience managing external IP vendors and direct customer engagements around technical deliverables and integration.
    • Strong track record driving schedule, risk, and budget management across many concurrent, interdependent workstreams.
    • Excellent verbal and written communication skills, with the ability to tailor style, tone, and level of detail to any audience — from a deep technical exchange with individual engineers to a concise, decision-ready narrative for the CEO.
    • Ability to influence and drive alignment across engineering teams without direct authority, in a fast-moving startup environment.
    • Experience with program management tools (e.g., Jira, MS Project, Smartsheet, Confluence) and methodologies (Agile, Waterfall, or hybrid).

    Preferred Qualifications:

      What We Offer: