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Senior ASIC Verification engineer role responsible for verifying Netpreme silicon, IP and subsystems. The role includes defining and setting up the verification methodology from microarchitecture through tape-out, and post-silicon validation is highly preferred. Required experience includes 5+ years of ASIC/SOC verification and protocol stacks such as Ethernet, UCIe and UALink.
The biggest bottleneck in AI systems today is memory. Chips compute faster than they can be fed data—a problem known as the memory wall—and Netpreme is building the solution that allows AI memory to scale independently of AI compute. Our approach spans the full stack, from a proprietary memory management framework at the XPU kernel and OS levels to X-Mem™, the world’s first Memory Processing Unit (MPU) silicon. Founded by MIT researchers at the intersection of optical networking, ML systems, and GPU kernel optimization, we’re based in Cambridge, MA, and Santa Clara, CA. We’re looking for people who want to own hard problems end to end—and help shape the next generation of AI systems.
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We are seeking a Member of Technical Staff, Senior ASIC Verification Engineers.
This role demands proven technical leadership in ASIC verification and simulation methodologies. You will propose and setup the optimum verification methodology. You will be part of an early-stage startup working on an exciting product in the Artificial Intelligence/DataCenter space. The work involves learning advanced LLM in modern data centers and applications to design memory acceleration.
This role will be performed onsite from one of our offices in Santa Clara, CA or Boston, MA.
